1. Technical Field
This disclosure relates to semiconductor fabrication and more particularly, to a method for forming bottle shaped trench capacitors for semiconductor memories by employing an anisotropic wet etch process.
2. Description of the Related Art
The extendability of deep trench based memory devices is limited by the storage capacitance of the deep trench as the ground rules shrink. Since the capacitance that can be stored in the deep trench is a linear function of the surface area of the deep trench, the formation of a larger trench is beneficial. However, widening a deep trench has a large impact on layout area of a semiconductor chip.
Attempts have been made to increase the surface area of a deep trench below an insulating collar which is formed within the deep trench. The region below the insulating collar is not as limited in available area as an upper portion of the deep trench. To expand the region below the collar, an isotropic silicon reactive ion etch (RIE) process can be employed. The RIE process recesses a silicon substrate below the insulating collar to provide increased surface area. The RIE process suffers from many disadvantages. These disadvantages include:
1. Low selectivity to oxide. With the reactive ion etch process the insulating collar is also etched thereby reducing the thickness of the insulating collar. The insulating collar is, for example, a LOCOS oxide or a deposited oxide. When this oxide is thinned vertical leakage currents may occur.
2. Expensive process. The RIE tools are expensive and have a low throughput due to the need for single wafer processing.
3. Collateral damage. The RIE process leaves polymer deposits in etched areas which may have a detrimental effect on component performance. The RIE process may cause surface damage to etched areas and undesirable side pockets may be formed in etched areas.
Therefore, a need exists for an improved method for increasing surface area of deep trench capacitors. A further need exists for a more economical method of increasing the surface area of the deep trench capacitors.
In accordance with the present invention, a method for expanding trenches includes the steps of forming a trench in a substrate, preparing surfaces within the trench by etching the surfaces with a wet etchant to substantially remove native oxide (create an H-terminated surface) from the surfaces within the trench and anisotropically wet etching the surfaces of the trench to expand the trench.
A method for forming expanded deep trenches for semiconductor devices includes the steps of forming a trench in a substrate, forming a collar in an upper portion of the trench, anisotropically etching a lower portion of the trench selective to the collar by: preparing a surface of the lower portion of the trench by providing a hydrogen Terminated surface on the lower portion of the trench and wet etching the lower portion of the trench with a basic solution to expand the trench.
Another method for forming expanded deep trenches for semiconductor devices includes the steps of forming a trench in a monocrystalllne silicon substrate, forming an oxide collar in an upper portion of the Ereich, preparing a surface of a lower portion of the trench by etching the surface with hydrogen fluoride, the surface being prepared to provide a hydrogen terminated surface on The lower portion of the trench and anisotropically wet etching, with an ammonium hydroxide etchant, the lower portion of :he trench being etched selective to the collar to expand the trench to crystallographic surfaces of the substrate in the lower portion of the trench.
In alternate embodiments, the step of preparing surfaces within the trench may include the step of preparing the surface by etching the surfaces with hydrogen fluoride. The step of anisotropically wet etching the trench to expand the trench may include the step of anisotropically wet etching the trench by employing ammonium hydroxide. The step of anisotropically wet etching the trench to expand the trench may also include the step of anisotropically wet etching the trench at temperatures of between about 10xc2x0 C. to about 80xc2x0 C. The step of anisotropically wet etching the trench to expand the trench may further include the step of anisotropically wet etching the trench in a batch process. The step of anisotropically wet etching preferably forms rectangular trenches. The substrate is preferably comprised of monocrystalline silicon, and the step of anisotropically wet etching may include the step of removing silicon from the trench according to crystallographic surfaces of the substrate. The anisotropic wet etching preferably forms a trench with a rectangle shape, and the step of removing may include the step of expanding surfaces of the trench to (110) surfaces. The wet etching preferably provides smoother surfaces than conventional methods of etching. For example, a surface planarity is 15 nm or less over a depth of a trench. The steps of forming a buried plate electrode prior to the anisotropic etch or after the anisotropic etch may be included. The step of wet etching preferably has a selectivity ratio of greater than 1000:1 between the substrate and the collar. The present invent on also improves surface roughness of the silicon substrate surface over the surface roughness for RIE processes.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of Illustrative embodiments thereof, which is to be read in connection wish the accompanying drawings.